What are bare dies?

A bare die flip-chip package is a semiconductor package in which an IC chip is flip-chip mounted on an organic substrate and the interconnect area is filled with underfill resin. Stacked package structure like a PoP (Package on Package) can be formed by mounting IC chips.

Why is defect inspection important in wafer fabrication?

If numerous defects occur on the surface of a wafer, the circuit patterns are not created correctly, causing patterns to be missing. If there are numerous defects, they prevent the electronic circuit from operating correctly, thereby making the wafer a lot-out* product as a defective product.

What is nuisance defect?

The system may also detect what is commonly called a nuisance. In simple terms, a nuisance is an irregularity or false defect on the wafer, but is not a defect of interest. In the past, a tool could process the information and delineate the difference between the defects and nuisances on a map.

What is CD SEM?

A Critical Dimension SEM (CD-SEM: Critical Dimension Scanning Electron Microscope) is a dedicated system for measuring the dimensions of the fine patterns formed on a semiconductor wafer. CD-SEM is mainly used in the manufacturing lines of electronic devices of semiconductors.

What are the 4 types of inspections?

What are the 4 types of quality inspection?

  • Pre-Production Inspection (PPI)
  • During Production Inspection (DPI)
  • Pre-shipment inspection (PSI)
  • Container loading/loading supervision (LS)
  • Piece-by-piece Inspections.

What is the production control for epi wafers?

Production of Epi wafers is controlled in two levels: a standard process control (level 1) and a detailed control (level 2).

What is wafer inspection?

The science of finding defects on a silicon wafer. Wafer inspection, the science of finding defects on a wafer, is becoming more challenging and costly at each node. This is due to process shrinks, design complexities and new materials.

What are the non-destructive and non-contact measurement techniques for epi wafers?

Non-destructive and non-contact measurement technique tool: QCS 7200RC Profile Determination Spreading Resistance (SRP) tool: SPR-2000 Structure Evaluation acc. to ASTM F 1049-90 – Level A. This method covers the evaluation of epi wafer quality in terms of haze and structural defects after heat treatment (oxidation)

What is the epitaxial layer deposition process in epi wafer?

In the Epi Wafer production the epitaxial layer dep- osition process is a very important step. Perfectness of the layer depends strongly on ingot and substrate quality.